Graduate Computer Architecture
計算機系統結構

Fall 2005

Instructor

洪士灝助理教授
Shih-Hao Hung, Assistant Professor
資訊工程學系 320 室
Phone : 02-3366-4888 ext. 320
e-mail : hungsh@csie.ntu.edu.tw

Teaching Assistant 助教
吳建成
資訊工程學系 502 室
Phone : 02-3366-4888 ext. 502
e-mail : r94922119@ntu.edu.tw

Course Description

This course focuses on the techniques of quantitative analysis and evaluation of modern computing systems, such as the selection of appropriate benchmarks to reveal and compare the performance of alternative design choices in system design. The emphasis is on the major component subsystems of high performance computers: pipelining, instruction level parallelism, memory hierarchies, input/output, and network-oriented interconnections.

Textbook

J. L. Hennessy and D. A. Patterson, Computer Architecture: A Quantitative Approach, 3rd Edition, Morgan Kaufmann Publishing Co., 2002.

Course Grading

More information about Final Projects: Project proposals need to be reviewed by the instructor TWO WEEKS after the mid-term exam. Projects can be done by a team or an individual. You have to decide whether you want to do a project or take the final exam. Once the decision is made, it cannot be changed.

Hours and Locations

一般班   @資107, 1:20pm-4:20pm Thursday

Course Coverage (Reference Only)

Part 1. Review: Fundamentals of Computer Architecture (Ch. 1), Instruction Set Architecture (Ch. 2), Pipelining (App A), Caches

Part 2. Pipelining, Interrupts, and Instructional Level Parallelism (Ch. 3, 4)

Part 3. Memory Hierarchy (Chapter 5)

Part 4. Multiprocessors, Memory Models, Multithreading  (Chapter 6)

Part 5. Embedded processors & other topics if time permits

Course Schedule (一般班)

Week#1    Lecture 1 Introduction (PPT).

Week#2    Lecture 1 continued;
                   Quiz#1 in class;
                   Homework#1 issued.

Week#3    Lecture 1 finished;
                   Lecture 2 Review Proc, Pipeline, Cache (PPT);
                   Quiz#1 graded & returned;
                   Homework#1 due;
                   Homework#2 issued.

Week#4    Lecture 2 finished;
                   Lecture 3 ControlFlow, Pipeline Traps, Banch Prediction (PPT);
                   Homework#2 due.

Week#5    Lecture 3 continued;
                   Homework #3 issued;
                   Paper Reading: Yeh[1993](PDF), Emer[1984](PDF);                

Week#6    Lecture 3 finished;
                   Homework #3 due date postponed; Two questions added to HW#3.
                   Lecture 4 Out-of-Order Completion (PPT);
                   Reading: Ch3.6, Ch4.1, Ch4.2, Cray-1 (PDF), CDC6600 (PDF)

Week#7    Homework #3 due;
                   Lecture 5 Scoreboard  (PPT);
                   Lecture 6 Dynamically Scheduled Instruction Processing  (PPT);
                   Lecture 7 ILP Loops (PPT);
                   Reading: Tomasulo[1967] (PDF); Chapter 3

Week#8    Mid-term Exam.

Week#9    Lecture 8 Caches (PPT);
                   Reading: Ch5.4-18;
                   Bonus: The IC Design Industry (PPT);

Week#10  Lecture 9 Shared Memory Multiprocessors (PPT, PPT with white background);
                   Reading: Ch6.1-4;
                   Reference Textbook:
                        Parallel Computer Architecture: A Hardware/Software Approach
                        D.E. Culler, J.P. Singh, A. Gupta, 1999 Morgan Kaufmann.

Week#11  Lecture 9 finished;
                   Initiating Term Projects (Some Ideas for Term Projects);

Week#12  Lecture 10 Distributed Memory Multiprocessors (PPT);
                   Lecture 11 Multithreaded Architectures (PPT);

Week#13  Lecture 11 Continued;
                   Computer Performance Optimization (PPT)

Week#14  Lecture 12 Scalable Computing (PPT);
                   Reading: Ch8.10-12;
                   Paper Reading: Giant Internet Service (PDF), Deep Data (PDF), Science-Driven Arch (PDF);

Week#15  Lecture 13 Introduction to Embedded Systems (PPT);
                   Lecture 14 Put It All Together at Work (PPT);

Week#16  Final Exam

Week#17  Project Demo/Report;

Week#18  Grades submitted.